fpga_phy_zigbee
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fpga_phy_zigbee [2017/12/06 16:23] – [FPGA-based IEEE 802.15.4 PHY Transmitter via Custom Bitstream (PicoSDR)] ooubejja | fpga_phy_zigbee [2017/12/14 13:47] – [Find the Bitstream] ooubejja | ||
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We will need some blocks of the module [[https:// | We will need some blocks of the module [[https:// | ||
- | ==== Download bitstream | + | ==== Find the Bitstream |
- | In order to use the FPGA Transmitter design, we will have to load the custom | + | In order to use the FPGA Transmitter design, we will have to load the custom |
- | The receiver node(s) will run the default | + | |
+ | ''/ | ||
+ | |||
+ | Copy the file in your main directory : | ||
+ | < | ||
+ | you@srvairlock: | ||
+ | </ | ||
+ | |||
+ | //The receiver node(s) will run the default | ||
---- | ---- | ||
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* ATTENTION : **Channel** parameter has to be set to **__3__** as in the previous image. That's the only channel that allows access to the custom design. | * ATTENTION : **Channel** parameter has to be set to **__3__** as in the previous image. That's the only channel that allows access to the custom design. | ||
- | |||
- | * **Radio420x** | ||
- | * Set CR1 value to 0 to enable the transmitter | ||
* **Custom Register** (CR 1 & 4) | * **Custom Register** (CR 1 & 4) | ||
Line 63: | Line 68: | ||
* Set CR1 value to 0 to enable the transmitter | * Set CR1 value to 0 to enable the transmitter | ||
* Set CR4 value to 0 to disable MIMO synchronization | * Set CR4 value to 0 to disable MIMO synchronization | ||
+ | |||
+ | * **Radio420 ** | ||
+ | * The Radio420x is a Multimode SDR [[https:// | ||
+ | * To be short, add 2 '' | ||
+ | * Now, we only need one transmitter per node, so make sure to enable only the Radio420 TX of Card 1, and set the gain values as following : | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | * For the 3 remaining '' | ||
+ | |||
//If you don't get this part, have a look [[from_gnuradio_to_cortxlab_pico|here]].// | //If you don't get this part, have a look [[from_gnuradio_to_cortxlab_pico|here]].// | ||
- | There isn't that much done in here since all baseband processing is done by the FPGA. All that is left is to connect a '' | + | There isn't that much left in here since all baseband processing is done by the FPGA. All you have to do now is to connect a '' |
{{ : | {{ : | ||
- | The final flow-graph should look like this : | + | The final flow-graph |
{{ : | {{ : |
fpga_phy_zigbee.txt · Last modified: 2017/12/14 16:25 by ooubejja