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--- experiment_picosdr [2016/03/22 11:19] – [Bitstream] lbeseme
+++ experiment_picosdr [2016/03/22 16:56] – [Setup with GRC] lbeseme
@@ Line 15: / Line 15: @@
 If you want to use this bitstream there 3 custom register to set.
 Register 4 can be set to :
+  * 0 -> async
+  * 1 -> MIMO 2x2
+  * 2 -> MIMO 4x4
+Register 3 can be set to :
-* 0 -> async
+  * 0 -> Rx disabled
-* 1 -> MIMO 2x2
+  * 1 -> Rx enabled
-* 2 -> MIMO 4x4
+The register 3 must be set to 0 during initialization.
-Register 3 can be set to :
+This bitstream have several internal path which can be selected using custom register 1. In our case we want a passthrough so we need to set the register 1 with the value 6.
-* 0 -> Rx disabled
-* 1 -> Rx enabled
-This register must be set to 0 during initialization
@@ Line 32: / Line 32: @@
 ## Setup with GRC
+As an exemple we will se which blocks we need in order to perform a transmission or a reception using one antenna.
+#### Carrier Perseus Board
+This block is used  to specify wich perseus board we want to target.
+The ID field of the block will be used as an identifier for other blocks.
+The IP address within CortexLab is 192.168.0.101 for board A, and in case you are using a 4x4 Pico, IP address for board B is 192.168.0.102.
+You need initialize both RX and TX path in order to use a card. The order of initialization must be :
+  * TX card 1
+  * RX card 1
+  * TX card 2
+  * RX card 2
+  * custom registers
+#### Radio420 RX
+This block is used to configure the RX path for one card of one board (a 2x2 Pico has one board with 2 cards).
+Let's explain all parameters you have to set:
+  * **Target ID** -> This correspond to the ID of the corresponding Carrier Perseus Board block.
+  * **Block priority** -> used to init one card before an other.
+  * **Card number** -> Used to specify either you are using card 1 or 2.
+  * **Enable** -> Allow to disable a path.
+  * **Reference** -> Must be internal for card 1 and external for card 2.
+  * **RX frequency** -> Baseband frequency.
+  * **Data rate** -> Must twice the sample rate (because of the I/Q signal).
+  * **Automatic Calibration** -> When automatic calibration is enabled, a calibration algorithm will be run during initialization to minimize LO leakage, IQ gain and phase imbalance. It is recommended to enable it.
+  * **Band** -> Must be set regarding your baseband frequency.
+  * **Update Rate** -> How often to update the gain. This value is in Hertz.
+  * **RX LNA gain** -> Receive Low Noise Amplifier gain.
+  * **RX VGA1 gain** -> Receive amplifier 1.
+  * **RX gain 2** -> Receive amplifier 2. Can be set from 0 to 30 dB.
+  * **RX gain 3** -> Receive amplifier 3. Can be set from -13 dB to 18 dB.
+  * **RX Low Pass Filter Bandwith** -> This is a configurable analog filter within the RX path. You may set it to any value in the available list. The values are bandwidths on each side of the center frequencies.
+  * **RX Band-Pass Filter** -> This is to select a band-pass filter from the filter bank.
+  * **Reference Clock Control** -> This is to select who controls the Reference Clock between the Host and the FPGA. Select Host.
+  * **Radio Frequency Control** -> This is to select who controls the Radio Frequency between the Host and the FPGA. Select Host.
+  * **RX Gain Control** -> This is to select who controls the RX Gain between the Host and the FPGA. Select Host.
+  * **PLL/CPLD Control** -> This is to select who controls the PLL/CPLD(io expanders) between the Host and the FPGA. Select Host.
+#### Radio420 TX
+This block is used to configure the TX path for one card of one board (a 2x2 Pico has one board with 2 cards).
+Let's explain all parameters you have to set:
+  * **Target ID** -> This correspond to the ID of the corresponding Carrier Perseus Board block.
+  * **Block priority** -> used to init one card before an other.
+  * **Card number** -> Used to specify either you are using card 1 or 2.
+  * **Enable** -> Allow to disable a path.
+  * **Reference** -> Must be internal for card 1 and external for card 2.
+  * **TX frequency** -> Baseband frequency.
+  * **Data rate** -> Must twice the sample rate (because of the I/Q signal).
+  * **Automatic Calibration** -> When automatic calibration is enabled, a calibration algorithm will be run during initialization to minimize LO leakage, IQ gain and phase imbalance. It is recommended to enable it.
+  * **Band** -> Must be set regarding your baseband frequency.
+  * **Update Rate** -> How often to update the gain. This value is in Hertz.
+  * **TX VGA1 gain** -> Transmit amplifier 1. Can be set from -35 dB to -4 dB.
+  * **TX VGA2 gain** -> Transmit amplifier 2. Can be set from 0 to 25 dB.
+  * **TX gain 3** -> Transmist amplifier 3. Can be set from -13 dB to 18 dB.
+  * **TX Low Pass Filter Bandwidth** -> This is a configurable analog filter within the TX path. You may set it to any value in the available list. The values are bandwidths on each side of the center frequencies.
+  * **Reference Clock Control** -> This is to select who controls the Reference Clock between the Host and the FPGA. Select Host.
+  * **Radio Frequency Control** -> This is to select who controls the Radio Frequency between the Host and the FPGA. Select Host.
+  * **RX Gain Control** -> This is to select who controls the RX Gain between the Host and the FPGA. Select Host.
+  * **PLL/CPLD Control** -> This is to select who controls the PLL/CPLD(io expanders) between the Host and the FPGA. Select Host.
 ## Setup with python project