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Documentation & How-to

Here you will find documentation and how-to about the environment used by CorteXlab and provided to users.

CorteXlab

Experimental workflow

Node position map

(Click on the image for a higher resolution picture)

Minus

GNURadio

USRPs

There 26 USRPs installed in the FIT/CorteXlab room.

  • 22 are of type NI-2932 (equivalent USRP N210 with a SBX daughterboard). Here are the main characteristics of these (for more details refer to the USRP-2932 specifications page at NI):
    • Frequency range: 400 MHz to 4.4 GHz
    • One Gigabit/s ethernet attachment to control node
    • Maximum bandwidth: 20 MHz (but in practice less than 20 MHz are usable without loss of samples due to either the gigabit ethernet connectivity or the computing power of the signal processing computer)
    • Full-duplex TX and RX chains. There are antennas connected to the TX/RX and RX2 ports of all USRPs. In the case the TX/RX ports are used, then only half-duplex is supported
    • Synchronization: All USRPs are connected to a stack of octoclocks (see below for more info) and can be configured to work in synchronized mode by selecting external clock source in the USRP sink or source configuration.
  • 4 are of type N2944R (equivalent of X310). Here are the main characteristics of these (for more details refer to the USRP-2944 specifications page at NI):
    • Frequency range: 10 MHz to 6 GHz
    • Dual 10 Gigabit/s ethernet attachment to control node
    • Maximum bandwidth: 160 MHz (theorically, the dual 10 Gigabit/s ethernet attachment should be sufficient to transfer this whole bandwidth, but in practice in most cases the computing power of the signal processing computer will limit that)
    • Synchronization: All USRPs are connected to a stack of octoclocks (see below for more info) and can be configured to work in synchronized mode by selecting external clock source in the USRP sink or source configuration.

Find here tutorials on how to use them

Octoclocks

A hierarchy of octoclocks allow the reference and timing distribution to all USRPs in CorteXlab. All cables are of same length (5m between master and slave octoclocks and 10m between slave octoclocks and USRPs). The connection layout is as shown below. The octoclock 0 is the master and the octoclocks 1-4 are the slave ones.

Timing measurements in the CorteXlab room:

The octoclock produces a PPS signal that has a period of 1s and remains high during 200ms and low 800ms as shown below:

The PPS signals between the slave octoclocks in the room are mismatched by a maximum of 800ps as shown below (examples):

Between nodes 28 (connected to octoclock 3) and 31 (connected to octoclock 4)

Between nodes 31 (connected to octoclock 4) and 14 (connected to octoclock 2)

Between nodes 14 (connected to octoclock 2) and 10 (connected to octoclock 1)

Between nodes 10 (connected to octoclock 1) and 27 (connected to octoclock 3)

For more (updated) info on the octoclocks:

Octoclock specifications on Ettus site

USRP Clock synchronization at Ettus

PicoSDRs

doc.txt · Last modified: 2022/11/07 13:50 by lcardoso